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[Other resource] FIR_1

Description: FIR滤波器的verilog实现，实现6级流水线的程序设计。-FIR filter Verilog, has implemented six lines of program design.
Platform: | Size: 950 | Author: 李甫 | Hits:

[Other resource] two_d_fir

Description: FIR FILTER verilog code-FIR FILTER Verilog code
Platform: | Size: 26834 | Author: QQ | Hits:

[Other resource] fir_finall

Description: 用verilog编写的fir滤波器程序，开发环境可以用ise quartus或active hdl等-verilog prepared with the fir filter process development environment can be used ise quartus or other active hdl
Platform: | Size: 1233 | Author: 刘东 | Hits:

[VHDL-FPGA-Verilog] FIR

Description: 基于fpga的FIR滤波器设计,已通过modesim仿真结果正确,verilog编写-Fpga-based FIR filter design, has passed modesim simulation results are correct, verilog prepared
Platform: | Size: 586752 | Author: zengdeqian | Hits:

[VHDL-FPGA-Verilog] FIR

Description: 使用Verilog语言编写的FIR滤波器,在Xilinx Spartan-6上运行通过,是很好的Verlog程序-Using Verilog language FIR filter, the Xilinx Spartan-6 run through, is a very good program Verlog
Platform: | Size: 8192 | Author: 于洋 | Hits:

[VHDL-FPGA-Verilog] matlab-and-verilog-fir4_3

Description: 四抽头FIR滤波器matlab,verilog顶层，子模块，以及testbench代码-Four tap FIR filter matlab, verilog top, sub modules, as well as the testbench code
Platform: | Size: 8192 | Author: 李静 | Hits:

[VHDL-FPGA-Verilog] FILTER

Description: VERILOG CODE FOR 1D FIR FILTER IMPLIMENTATION -VERILOG CODE FOR 1D FIR FILTER IMPLIMENTATION
Platform: | Size: 1024 | Author: gsp | Hits:

[VHDL-FPGA-Verilog] 2D-FILTER

Description: VERILOG CODE FOR 2D FIR FILTER
Platform: | Size: 2048 | Author: gsp | Hits:

[VHDL-FPGA-Verilog] FIR

Description: 用Verilog HDL实现FIR滤波器的功能，文件包括Verilog HDL的源代码。-Using Verilog HDL realize the FIR filter function, the file includes Verilog HDL source code.
Platform: | Size: 15360000 | Author: 雪洁 | Hits:

[Documents] high-pass-filter-design

Description: 基于verilog的高通fir数字滤波器设计-Verilog fir digital high-pass filter design based on
Platform: | Size: 1489920 | Author: SamHillzj | Hits:

[Other] filter

Description: 大神写的FIR滤波器，verilog所写，短小精悍，易读懂！-Great God wrote the FIR filter, verilog written, short and pithy, easy to read!
Platform: | Size: 521216 | Author: 邓小林 | Hits:

[VHDL-FPGA-Verilog] FIR

Description: 基于Verilog的FIR滤波器的设计，该代码包含完整的工程，可以利用quartus软件直接运行-Design of FIR filter based on Verilog, the code contains a complete project, can use quartus software to run directly
Platform: | Size: 165888 | Author: 张林 | Hits:

[assembly language] FIR

Description: This is verilog code for FIR Filter with testbench availble.
Platform: | Size: 2048 | Author: rohit | Hits:

[VHDL-FPGA-Verilog] fir

Description: This a verilog code for FIR filter works good on linux and windows platform-This is a verilog code for FIR filter works good on linux and windows platform
Platform: | Size: 1024 | Author: prad | Hits:

[matlab] fir-sample

Description: fir滤波的补码变换，用于verilog程序-fir filter complement conversion program for verilog
Platform: | Size: 2048 | Author: wq | Hits:

[VHDL-FPGA-Verilog] fpga-fir

Description: 使用Quartus II 9.1完成低通FIR滤波器的实现，在任意开发板上都能实现。操作简单，使用的是VHDL和Verilog语言-Use the Quartus II 9.1 the realization of the complete low pass FIR filter, can be implemented in any development board. The operation is simple, the use of VHDL and the Verilog language
Platform: | Size: 1404928 | Author: 韩闯 | Hits:

[Other] fir

Description: A classic FIR filter implemented using Verilog HDL on the Xilinx software-A classic FIR filter implemented using Verilog HDL on the Xilinx software
Platform: | Size: 1024 | Author: DarkRofl | Hits:

[VHDL-FPGA-Verilog] fir

Description: 基于verilog的 FIR低通滤波器的实现(Implementation of FIR low pass filter based on Verilog)
Platform: | Size: 140288 | Author: yaaaan | Hits:

[LabView] polyphase fir

Description: fir filter using verilog
Platform: | Size: 264824 | Author: mamine2ia | Hits:

[VHDL-FPGA-Verilog] 5_fir_tran

Description: 经典的verilog语言实现转置型FIR滤波器的代码(Code of Inverted FIR Filter Implemented by Classical Verilog Language)
Platform: | Size: 266240 | Author: ThBryan | Hits:
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